74LVC240A Datasheet | Nexperia

description The 74LVC240A is an 8-bit inverting buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on n OE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits - Overvoltage tolerant inputs to 5.5 V - Wide supply voltage range from 1.2 to 3.6 V - CMOS low power consumption - Direct interface with TTL levels - IOFF circuitry provides partial Power-down mode operation - plies with JEDEC standard: - JESD8-7A (1.65 V to 1.95 V) - JESD8-5A (2.3 V to 2.7 V) - JESD8-C/JESD36 (2.7 V to 3.6 V) - ESD protection: - HBM JESD22-A114F exceeds 2000 V - MM JESD22-A115B exceeds 200 V - CDM JESD22-C101E exceeds 1000 V - Multiple package options - Specified from -40 °C to +85 °C and -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74LVC240AD -40 °C to +125 °C SO20 plastic small outline package; 20 leads; body width 7.5 mm 74LVC240APW -40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm 74LVC240ABQ -40 °C to +125 °C DHVQFN20 plastic dual in-line patible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm Version SOT163-1 SOT360-1 SOT764-1 Nexperia Octal buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-state 4. Functional diagram 2 1A0...