74LVC1G386
74LVC1G386 is 3-input EXCLUSIVE-OR gate manufactured by Nexperia.
description
The 74LVC1G386 is a single 3-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
2. Features and benefits
- Wide supply voltage range from 1.65 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- High noise immunity
- CMOS low power dissipation
- Direct interface with TTL levels
- ±24 m A output drive (VCC = 3.0 V)
- IOFF circuitry provides partial Power-down mode operation
- Latch-up performance exceeds 250 m A
- plies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V)
- JESD36 (4.5 V to 5.5 V)
- ESD protection:
- HBM EIA/JESD22-A114E exceeds 2000 V
- MM EIA/JESD22-A115-A exceeds 200 V.
- Specified from -40 to +85 °C and -40 to +125 °C.
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74LVC1G386GW -40 °C to +125 °C
Name TSSOP6
74LVC1G386GV -40 °C to +125 °C SC-74; TSOP6
Description plastic thin shrink small outline package; 6 leads; body width 1.25 mm plastic surface-mounted package; 6 leads
Version SOT363-2
SOT457
Nexperia
3-input EXCLUSIVE-OR gate
4. Marking
Table 2. Marking Type number 74LVC1G386GW 74LVC1G386GV
Marking code [1] YH YH
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional...
