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74LVC1G17 - Single Schmitt trigger buffer

Description

The 74LVC1G17 is a single buffer Schmitt-trigger.

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Features

  • Wide supply voltage range from 1.65 V to 5.5 V.
  • Overvoltage tolerant inputs to 5.5 V.
  • High noise immunity.
  • CMOS low power dissipation.
  • IOFF circuitry provides partial Power-down mode operation.
  • ±24 mA output drive (VCC = 3.0 V).
  • Latch-up performance exceeds 250 mA.
  • Direct interface with TTL levels.
  • Unlimited rise and fall times.
  • Complies with JEDEC standard:.
  • JESD8-7 (1.65 V to 1.95 V).
  • J.

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Datasheet Details

Part number 74LVC1G17
Manufacturer Nexperia
File Size 280.17 KB
Description Single Schmitt trigger buffer
Datasheet download datasheet 74LVC1G17 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74LVC1G17 Single Schmitt trigger buffer Rev. 14 — 14 January 2022 Product data sheet 1. General description The 74LVC1G17 is a single buffer Schmitt-trigger. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.5 V • Overvoltage tolerant inputs to 5.5 V • High noise immunity • CMOS low power dissipation • IOFF circuitry provides partial Power-down mode operation • ±24 mA output drive (VCC = 3.
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