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74LVC1G10-Q100 - Single 3-input NAND gate

Description

The 74LVC1G10-Q100 provides a low-power, low-voltage single 3-input NAND gate.

The inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of this device in a mixed 3.3 V and 5 V environment.

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
  • Wide supply voltage range from 1.65 V to 5.5 V.
  • High noise immunity.
  • ±24 mA output drive (VCC = 3.0 V).
  • CMOS low power dissipation.
  • Latch-up performance exceeds 250 mA.
  • Direct interface with TTL levels.
  • Inputs accept voltages up to 5 V.
  • IOFF circuitry provides partial Power-do.

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Datasheet preview – 74LVC1G10-Q100

Datasheet Details

Part number 74LVC1G10-Q100
Manufacturer nexperia
File Size 191.67 KB
Description Single 3-input NAND gate
Datasheet download datasheet 74LVC1G10-Q100 Datasheet
Additional preview pages of the 74LVC1G10-Q100 datasheet.

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Full PDF Text Transcription

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74LVC1G10-Q100 Single 3-input NAND gate Rev. 4 — 2 February 2022 Product data sheet 1. General description The 74LVC1G10-Q100 provides a low-power, low-voltage single 3-input NAND gate. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2.
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