Datasheet4U Logo Datasheet4U.com

74LV1T125 - Single supply translating buffer/line driver

General Description

The 74LV1T125 is a single, level translating buffer/line driver with 3-state output.

The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation.

Key Features

  • Single supply voltage translator at 1.8 V, 2.5 V, 3.3 V and 5.0 V.
  • Up translation.
  • 1.2 V to 1.8 V at VCC = 1.8 V.
  • 1.5 V to 2.5 V at VCC = 2.5 V.
  • 1.8 V to 3.3 V at VCC = 3.3 V.
  • 3.3 V to 5.0 V at VCC = 5.0 V.
  • Down translation.
  • 3.3 V to 1.8 V at VCC = 1.8 V.
  • 3.3 V to 2.5 V at VCC = 2.5 V.
  • 5.0 V to 3.3 V at VCC = 3.3 V.
  • 5 V tolerant inputs.
  • Latch-up performance exceeds 250 mA per JESD 78 Clas.

📥 Download Datasheet

Datasheet Details

Part number 74LV1T125
Manufacturer Nexperia
File Size 242.33 KB
Description Single supply translating buffer/line driver
Datasheet download datasheet 74LV1T125 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74LV10 Triple 3-input NAND gate Philips
74LV107 Dual JK flip-flop Philips
74LV109 Dual JK flip-flop Philips
74LV11 Triple 3-input AND gate Philips
74LV123 Dual retriggerable monostable multivibrator Philips

Other Datasheets by Nexperia

Part Number Description
74LV1T126 Single supply translating buffer/line driver
74LV1T00 2-input single supply translating NAND gate
74LV1T02 2-input single supply translating NOR gate
74LV1T04 Single supply translating inverter
74LV1T08 2-input single supply translating AND gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74LV1T125 Single supply translating buffer/line driver; 3-state Rev. 4 — 16 August 2022 Product data sheet 1. General description The 74LV1T125 is a single, level translating buffer/line driver with 3-state output. The low threshold inputs support 1.8 V input logic at VCC = 3.3 V and can be used in 1.8 V to 3.3 V level up translation. In addition, the 5 V tolerant input pins enable down translation (3.3 V to 2.5 V output at VCC = 2.5 V). The 3-state output is controlled by the output enable input (OE). A HIGH-level at OE causes the output to assume a high-impedance OFF-state. The output level is referenced to the supply voltage and supports 1.8 V, 2.5 V, 3.3 V and 5.0 V CMOS levels. The wide VCC range permits the generation of output levels to connect to controllers or processors. 2.