74LV00APW gate equivalent, quad 2-input nand gate.
* Wide supply voltage range from 2.0 V to 5.5 V
* Maximum tpd of 9 ns at 5 V
* Typical VOL(p) < 0.8 V at VCC = 3.3 V, Tamb = 25 °C
* Typical VOH(v) > 2.3 .
using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the dev.
The 74LV00A is a quad 2-input NAND gate.
Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise .
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