74HCT9046A
Description
This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Key Features
- Operation power supply voltage range from 4.5 V to 5.5 V
- Low power consumption
- plies with JEDEC standard no. 7A
- Inhibit control for ON/OFF keying and for low standby power consumption
- Center frequency up to 17 MHz (typical) at VCC = 5.5 V
- Choice of two phase parators
- PC1: EXCLUSIVE-OR
- PC2: Edge-triggered JK flip-flop
- No dead zone of PC2
- Charge pump output on PC2, whose current is set by an external resistor Rbias
