Datasheet4U Logo Datasheet4U.com

74HCT374D - Octal D-type flip-flop

Download the 74HCT374D datasheet PDF. This datasheet also covers the 74HC374 variant, as both devices belong to the same octal d-type flip-flop family and are provided as variant models within a single manufacturer datasheet.

General Description

The 74HC374; 74HCT374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs.

Key Features

  • Wide supply voltage range from 2.0 to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Input levels:.
  • For 74HC374: CMOS level.
  • For 74HCT374: TTL level.
  • Octal bus interface.
  • Non-inverting 3-state outputs.
  • 8-bit positive, edge-triggered register.
  • Common 3-state output enable input.
  • Independent register and 3-state buffer operation.
  • Complies with JEDEC standards.
  • JESD8C (2.7.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC374-nexperia.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HCT374 Octal D-type flip-flop Philips
74HCT374 Octal D-Type Flip-Flop Texas Instruments
74HCT373 Octal D-type transparent latch NXP
74HCT373 OCTAL TRANSPARENT D-TYPE LATCHES Texas Instruments
74HCT377 Octal D-type flip-flop NXP

Other Datasheets by Nexperia

Part Number Description
74HCT374 Octal D-type flip-flop
74HCT373 Octal D-type transparent latch
74HCT373-Q100 Octal D-type transparent latch
74HCT373D Octal D-type transparent latch
74HCT373N Octal D-type transparent latch

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC374; 74HCT374 Octal D-type flip-flop; positive edge-trigger; 3-state Rev. 5 — 7 September 2021 Product data sheet 1. General description The 74HC374; 74HCT374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.