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74HCT20DB - Dual 4-input NAND gate

Download the 74HCT20DB datasheet PDF. This datasheet also covers the 74HC20 variant, as both devices belong to the same dual 4-input nand gate family and are provided as variant models within a single manufacturer datasheet.

Description

The 74HC20; 74HCT20 is a dual 4-input NAND gate.

Inputs include clamp diodes.

This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features

  • Complies with JEDEC standard JESD7A.
  • Low-power dissipation.
  • Input levels:.
  • For 74HC20: CMOS level.
  • For 74HCT20: TTL level.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2 000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • Multiple package options.
  • Specified from -40 °C to +80 °C and from -40 °C to +125 °C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC20-nexperia.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
74HCT20 Dual 4-input NAND gate Philips
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74HCT221 Dual non-retriggerable monostable multivibrator Philips
74HCT237 3-to-8 line decoder/demultiplexer Philips
74HCT237 High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer Texas Instruments

Other Datasheets by Nexperia

Part Number Description
74HCT20D Dual 4-input NAND gate
74HCT20 Dual 4-input NAND gate
74HCT20-Q100 Dual 4-input NAND gate
74HCT221 Dual non-retriggerable monostable multivibrator
74HCT238 3-to-8 line decoder/demultiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC20; 74HCT20 Dual 4-input NAND gate Rev. 5 — 27 March 2019 Product data sheet 1. General description The 74HC20; 74HCT20 is a dual 4-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Complies with JEDEC standard JESD7A • Low-power dissipation • Input levels: • For 74HC20: CMOS level • For 74HCT20: TTL level • ESD protection: • HBM JESD22-A114F exceeds 2 000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40 °C to +80 °C and from -40 °C to +125 °C. 3. Ordering information Table 1.