* Wide supply voltage range from 2.0 to 6.0 V
* CMOS low power dissipation
* High noise immunity
* Latch-up performance exceeds 100 mA per JESD 78 Class I.

The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is H.

Since 2006. D4U Semicon.   |   Contact Us   |   Privacy Policy   |   Purchase of parts