74HC165D - 8-bit parallel-in/serial out shift register
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Download the 74HC165D datasheet PDF.
This datasheet also covers the 74HC165 variant, as both devices belong to the same 8-bit parallel-in/serial out shift register family and are provided as variant models within a single manufacturer datasheet.
General Description
The 74HC165; 74HCT165 are 8-bit serial or parallel-in/serial-out shift registers.
Key Features
Wide supply voltage range from 2.0 V to 6.0 V.
CMOS low power dissipation.
High noise immunity.
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
Full PDF Text Transcription for 74HC165D (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
74HC165D. For precise diagrams, and layout, please refer to the original PDF.
74HC165; 74HCT165 8-bit parallel-in/serial out shift register Rev. 8 — 9 May 2025 Product data sheet 1. General description The 74HC165; 74HCT165 are 8-bit serial or para...
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1. General description The 74HC165; 74HCT165 are 8-bit serial or parallel-in/serial-out shift registers. The device features a serial data input (DS), eight parallel data inputs (D0 to D7) and two complementary serial outputs (Q7 and Q7). When the parallel load input (PL) is LOW the data from D0 to D7 is loaded into the shift register asynchronously. When PL is HIGH data enters the register serially at DS. When the clock enable input (CE) is LOW data is shifted on the LOW-to-HIGH transitions of the CP input. A HIGH on CE will disable the CP input. Inputs are overvoltage tolerant to 15 V. This enables the device to be used
74HC165D Datasheet
