74AUP1T34 buffer equivalent, low-power dual supply translating buffer.
* Wide supply voltage range from 1.1 V to 3.6 V
* CMOS low power dissipation
* High noise immunity
* Complies with JEDEC standards:
* JESD8-7 (1.2 V t.
using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the dev.
The 74AUP1T34 is a single dual supply translating buffer. Input A is referenced to VCC(A) and output Y is referenced to VCC(Y). Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures v.
Image gallery
TAGS
Download (Size : 312.31KB)