74AUP1G80 datasheet, flip-flop equivalent, nexperia

Features and benefits

* Wide supply voltage range from 0.8 V to 3.6 V
* CMOS low power dissipation
* High noise immunity
* Complies with JEDEC standards:
* JESD8-12 (0.8 V .

Application

using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the dev.

Description

The 74AUP1G80 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q outpu.

Image gallery