74AUP1G74 datasheet, flip-flop equivalent, nexperia

Features and benefits

* Wide supply voltage range from 0.8 V to 3.6 V
* CMOS low power dissipation
* High noise immunity
* Overvoltage tolerant inputs to 3.6 V
* Low static.

Application

using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the dev.

Description

The 74AUP1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LO.

Image gallery