74AUP1G374 flip-flop equivalent, low-power d-type flip-flop.
* Wide supply voltage range from 0.8 V to 3.6 V
* High noise immunity
* CMOS low power dissipation
* Complies with JEDEC standards:
* JESD8-12 (0.8 V .
using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the dev.
The 74AUP1G374 is a single D-type flip-flop; positive-edge trigger (3-state). Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption acros.
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