74AUP1G332 or-gate equivalent, low-power 3-input or-gate.
* Wide supply voltage range from 0.8 V to 3.6 V
* CMOS low power dissipation
* High noise immunity
* Complies with JEDEC standards:
* JESD8-12 (0.8 V .
using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the dev.
The 74AUP1G332 is a single 3-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V .
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