74AUP1G240 driver equivalent, low-power inverting buffer/line driver.
* Wide supply voltage range from 0.8 V to 3.6 V
* High noise immunity
* Complies with JEDEC standards:
* JESD8-12 (0.8 V to 1.3 V)
* JESD8-11 (0.9 V t.
using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the dev.
The 74AUP1G240 is a 1-bit inverting buffer/line driver with 3-state outputs. The device features an output enable (OE). A HIGH on OE causes the output to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit tolera.
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