74ALVT16821 Description
The 74ALVT16821 high-performance BiCMOS device bines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5 V or 3.3 V with I/O patibility to 5 V. The 74ALVT16821 has two 10-bit, edge triggered registers, with each register coupled to a 3-state output buffer.
74ALVT16821 Key Features
- 20-bit positive-edge triggered register
- 5 V I/O patible
- Multiple VCC and GND pins minimize switching noise
- Bus hold data inputs eliminate the need for external pull-up resistors to hold unused
- Live insertion and extraction permitted
- Power-up reset
- Power-up 3-state
- Output capability: +64 mA and -32 mA
- Latch-up protection
- JESD78: exceeds 500 mA