74ALVCH16843DGG
description
The 74ALVCH16843 has two 9- bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (n LE), clear (n CLR), preset (n PRE) and output enable (n OE) control gates.
When n OE is LOW, the data in the registers appear at the outputs. When n OE is HIGH, the outputs are in the high impedance OFF state. Operation of the n OE input does not affect the state of the flip-flops.
The 74ALVCH16843 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.
2 Features and benefits
- Wide supply voltage range of 1.2V to 3.6V
- CMOS low power consumption
- Direct interface with TTL levels
- Current drive ±24 m A at VCC = 3.0 V.
- MULTIBYTE flow-through standard pin-out architecture
- Low inductance multiple VCC and GND pins for...
