74AHCT74PW flip-flop equivalent, dual d-type flip-flop.
* Balanced propagation delays
* All inputs have Schmitt-trigger actions
* Inputs accept voltages higher than VCC
* Input levels:
* For 74AHC74: CMOS l.
The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop .
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