74AHCT377PW datasheet, flip-flop equivalent, nexperia

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Features and benefits

I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Ideal for addressable register applications I Data enab.

Application

I Data enable for address and data synchronization I Eight positive-edge triggered D-type ﬂip-ﬂops I Input levels: N For.

Description

The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard No. 7-A. The 74AHC377; 74AHCT377 has eight edge-triggered, D-type ﬂip-ﬂops with in.

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