TPS51463 Datasheet | Texas Instruments

.ti. SLUSAX2 - FEBRUARY 2012 3.3-V/5-V Input, D-CAP+™ Mode Synchronous Step-Down Integrated FETs Converter With 2-Bit VID Check for Samples: TPS51463 Features - 23 Integrated FETs Converter w/TI Proprietary D-CAP+™ Mode Architecture - Minimum External Parts Count - Support all MLCC Output Capacitor and SP/POSCAP - Auto Skip Mode - Selectable 700-k Hz and 1-MHz Frequency - Small 4 mm × 4 mm, 24-Pin, QFN Package APPLICATIONS - Low-Voltage Applications Stepping Down from 5-V or 3.3-V Rail - Notebook/Desktop puters - Intel® Chief River Platform ULV CPU System Agent DESCRIPTION The TPS51463 is a fully integrated synchronous buck regulator employing D-CAP+™. It is used for up to 5V step-down where system size is at its premium, performance and optimized BOM are must-haves. The TPS51463 fully supports the Intel® Chief River platform, a ULV/CPU system agent application with integrated 2-bit VID function. The TPS51463 also Features two switching frequency settings (700 k Hz and 1 MHz), skip mode, pre-bias startup, programmable external capacitor soft-start time/voltage transition time, output discharge, internal VBST Switch, 2-V reference (±1%), power good and enable. The TPS51463 is available in a 4 mm × 4 mm, 24pin, QFN package (Green Ro Hs pliant and Pb free) and is specified from -40°C to 85°C. +5V ENABLE VID0 VID1 PGOOD 18 17 16 15 14 13 V5DRV V5FILT PGOOD VID1 VID0 19 PGND 20 PGND 21 PGND 22 VIN 23 VIN 24...