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TMS320F280048 - Microcontrollers

Download the TMS320F280048 datasheet PDF. This datasheet also covers the TMS320F280049 variant, as both devices belong to the same microcontrollers family and are provided as variant models within a single manufacturer datasheet.

Features

  • TMS320C28x 32-bit CPU.
  • 100 MHz.
  • IEEE 754 single-precision Floating-Point Unit (FPU).
  • Trigonometric Math Unit (TMU).
  • 3×-cycle to 4×-cycle improvement for common trigonometric functions versus software libraries.
  • 13-cycle Park transform.
  • Viterbi/Complex Math Unit (VCU-I).
  • Ten hardware breakpoints (with ERAD).
  • Programmable Control Law Accelerator (CLA).
  • 100 MHz.
  • IEEE 754 single-precision floating-poi.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TMS320F280049-etcTI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TMS320F280049C-Q1, TMS320F280048C-Q1, TMS320F280041C-Q1, TMS320F280040C-Q1 TMS320F280049C, TMS320F280041C, TMS320F280049-Q1, TMS320F280048-Q1 TMS320F280041-Q1, TMS320F280040-Q1, TMS320F280049, TMS320F280045, TMS320F280041 SPRS945G – JANUARY 2017 – REVISED JANUARY 2023 TMS320F28004x Real-Time Microcontrollers 1 Features • TMS320C28x 32-bit CPU – 100 MHz – IEEE 754 single-precision Floating-Point Unit (FPU) – Trigonometric Math Unit (TMU) • 3×-cycle to 4×-cycle improvement for common trigonometric functions versus software libraries • 13-cycle Park transform – Viterbi/Complex Math Unit (VCU-I) – Ten hardware breakpoints (with ERAD) • Programmable Control Law Accelerator (CLA) – 100 MHz – IEEE 754 single-precision floating-point instructions – Executes code independently of main CPU • On-chi
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