Datasheet4U Logo Datasheet4U.com

TMS320C6713 - Floating-Point Digital Signal Processor

Description

.

.

12 CPU (DSP core) description 13 me

Features

  • Native Instructions for IEEE 754.
  • Single- and Double-Precision.
  • Byte-Addressable (8-, 16-, 32-Bit Data).
  • 8-Bit Overflow Protection.
  • Saturation; Bit-Field Extract, Set, Clear; Bit-Counting; Normalization D L1/L2 Memory Architecture.
  • 4K-Byte L1P Program Cache (Direct-Mapped).
  • 4K-Byte L1D Data Cache (2-Way).
  • 256K-Byte L2 Memory Total: 64K-Byte L2 Unified Cache/Mapped RAM, and 192K-Byte Additional L2 Mapped RAM D Device Configu.

📥 Download Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TMS320C6713, TMS320C6713B FLOATING-POINT DIGITAL SIGNAL PROCESSORS SPRS186I − DECEMBER 2001 − REVISED MAY 2004 D Highest-Performance Floating-Point Digital Signal Processors (DSPs): C6713/C6713B − Eight 32-Bit Instructions/Cycle − 32/64-Bit Data Word − 300-, 225-, 200-MHz (GDP), and 200-, 167-MHz (PYP) Clock Rates − 3.3-, 4.
Published: |