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SNJ54HC42FK - 4-LINE TO 10-LINE DECODERS

Download the SNJ54HC42FK datasheet PDF. This datasheet also covers the SNJ54HC42J variant, as both devices belong to the same 4-line to 10-line decoders family and are provided as variant models within a single manufacturer datasheet.

General Description

These decimal decoders consist of eight inverters and ten 4-input NAND gates.

The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SNJ54HC42J-etcTI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 14 ns D ±4-mA Output Drive at 5 V SN54HC42 . . . J OR W PACKAGE SN74HC42 . . . D, N, OR NS PACKAGE (TOP VIEW) 01 12 23 34 45 56 67 GND 8 16 VCC 15 A 14 B 13 C 12 D 11 9 10 8 97 6 7 SN54HC42, SN74HC42 4ĆLINE TO 10ĆLINE DECODERS (1 of 10) SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003 D Low Input Current of 1 µA Max D Full Decoding of Input Logic D All Outputs Are High for Invalid BCD Conditions D Also for Applications as 3-Line to 8-Line Decoders SN54HC42 . . .