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SN74LVC2G240 - Dual Buffer Driver

General Description

This dual buffer driver is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC2G240 device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and busoriented receivers and transmitters.

Key Features

  • 1.
  • 2 Available in the Texas Instruments NanoFree™ Package.
  • Supports 5-V VCC Operation.
  • Inputs Accept Voltages to 5.5 V.
  • Max tpd of 4.6 ns at 3.3 V.
  • Low Power Consumption, 10-µA Max ICC.
  • ±24-mA Output Drive at 3.3 V.
  • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C.
  • Ioff Supports Live Insertion, Partial-PowerDown Mode, and Back-Dr.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN74LVC2G240 www.ti.com SCES208I – APRIL 1999 – REVISED NOVEMBER 2013 Dual Buffer Driver With 3-State Outputs Check for Samples: SN74LVC2G240 FEATURES 1 •2 Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.6 ns at 3.3 V • Low Power Consumption, 10-µA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Live Insertion, Partial-PowerDown Mode, and Back-Drive Protection • Can Be Used as a Down Translator to Translate Inputs From a Max of 5.