SN74LVC1G125-EP gate equivalent, single bus buffer gate.
* Controlled Baseline
– One Assembly/Test Site, One Fabrication Site
* Enhanced Diminishing Manufacturing Sources (DMS) Support
* Enhanced Pro.
using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is .
ORDERING INFORMATION
This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.
This device is fully specified .
Image gallery
TAGS
Download