SN74HCT138N Datasheet | Texas Instruments

SN54HCT138, SN74HCT138 SCLS171F - MARCH 1984 - REVISED MARCH 2022 SNx4HCT138 3-Line to 8-Line Decoders/Demultiplexers 1 Features - Operating voltage range of 4.5 V to 5.5 V - Outputs can drive up to 10 LSTTL loads - Low power consumption, 80-µA max ICC - Typical tpd = 17 ns - ±4-m A output drive at 5 V - Low input current of 1 µA max - Inputs are TTL-Voltage patible - Designed specifically for high-speed memory decoders and data transmission systems - Incorporate three enable inputs to simplify cascading and/or data reception 2 Description The ’HCT138 devices are designed for highperformance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. PART NUMBER SN74HCT138D SN74HCT138N SN74HCT138NS SN74HCT138PW SN54HCT138J SNJ54HCT138FK Device Information PACKAGE(1) BODY SIZE (NOM) SOIC (16) 9.90 mm × 3.90 mm PDIP (16) 19.31 mm × 6.35 mm SO (16) 6.20 mm × 5.30 mm TSSOP (16) 5.00 mm × 4.40 mm CDIP (16) 24.38 mm × 6.92 mm LCCC...