Datasheet4U Logo Datasheet4U.com

SN74F283 - 4-Bit Binary Full Adders

General Description

The ′F283 is a full adder that performs the addition of two 4-bit binary words.

The sum (Σ) outputs are provided for each bit and the resultant carry (C4) output is obtained from the fourth bit.

Key Features

  • full internal look-ahead across all four bits generating the carry term C4 in typically 5.7 ns. This capability provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation. The adder logic, including the carry, is implemented in its true form. End-around carry can be accomplished without the need for logic or level inversion. The ′F283 can be used with either all-active-high (positive logic) or all-active-low (negativ.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
SN74101 AND-OR Gate ETC
SN74102 AND Gate ETC
SN74103 Dual J-K Flip-Flop ETC
SN74106 Dual J-K Flip-Flop ETC
SN74108 Dual J-K Flip Flop ETC

Other Datasheets by Texas Instruments

Part Number Description
SN74F283N 4-Bit Binary Full Adders
SN74F280B 9-Bit Parity Generators/Checkers
SN74F20 DUAL 4-INPUT POSITIVE-NAND GATES
SN74F21 Dual 4-Input Positive-AND Gates
SN74F2244 Octal Buffer/Driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
• Full-Carry Look-Ahead Across the Four Bits • Systems Achieve Partial Look-Ahead Performance With the Economy of Ripple Carry • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description The ′F283 is a full adder that performs the addition of two 4-bit binary words. The sum (Σ) outputs are provided for each bit and the resultant carry (C4) output is obtained from the fourth bit. The device features full internal look-ahead across all four bits generating the carry term C4 in typically 5.7 ns. This capability provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation.