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SN74AUP2G00 - LOW-POWER DUAL 2-INPUT POSITIVE-NAND GATE

Description

applications.

Features

  • 1.
  • Available in the Texas Instruments NanoStar™.
  • Package.
  • Low Static-Power Consumption (ICC = 0.9 mA Maximum).
  • Low Dynamic-Power Consumption.
  • (Cpd = 4.3 pF Typ at 3.3 V).
  • Low Input Capacitance (Ci = 1.5 pF Typical).
  • Low Noise.
  • Overshoot and Undershoot.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN74AUP2G00 www.ti.com SCES752C – SEPTEMBER 2009 – REVISED MAY 2010 LOW-POWER DUAL 2-INPUT POSITIVE-NAND GATE Check for Samples: SN74AUP2G00 FEATURES 1 • Available in the Texas Instruments NanoStar™ • Package • • Low Static-Power Consumption (ICC = 0.9 mA Maximum) • • Low Dynamic-Power Consumption • (Cpd = 4.3 pF Typ at 3.3 V) • • Low Input Capacitance (Ci = 1.5 pF Typical) • Low Noise – Overshoot and Undershoot • <10% of VCC • Ioff Supports Partial-Power-Down Mode Operation • Wide Operating VCC Range of 0.8 V to 3.6 V 1A 1B 2Y GND DCU PACKAGE (TOP VIEW) 1 8 2 7 3 6 4 5 VCC 1Y 2B 2A DQE PACKAGE (TOP VIEW) 1A 1 1B 2 2Y 3 GND 4 V 8 CC 7 1Y 6 2B 5 2A Optimized for 3.3-V Operation 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation tpd = 5.
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