SN74AUC32 Datasheet, Texas Instruments

* Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
* Ioff Supports Partial-Power-Down Mode Operation
* Sub-1-V O.

using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is .

ORDERING INFORMATION This quadruple 2-input positive-OR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC32 device performs the Boolean function Y + A ) B or Y + A
* B in posit.