SN74ABT16841
Description
These 20-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
Key Features
- 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads
- They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers
- WD PACKAGE SN74ABT16841
- The 20 transparent D-type latches provide true data at the outputs
- While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs
- When LE is taken low, the Q outputs are latched at the levels set up at the D inputs
- In the high-impedance state, the outputs neither load nor drive the bus lines significantly
- The output-enable input does not affect the internal operation of the latches
- Old data can be retained or new data can be entered while the outputs are in the high-impedance state
- Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated
