SN65LVDT250 Datasheet | Texas Instruments

.ti. SN65LVDS250 SN65LVDT250 SLLS594B - MARCH 2004 - REVISED OCTOBER 2004 LVDS 4x4 CROSSPOINT SWITCH Features - Greater Than 2.0 Gbps Operation - Nonblocking Architecture Allows Each Output to be Connected to Any Input - Pk-Pk Jitter: - 60 ps Typical at 2.0 Gbps - 110 ps Typical at 2.5 Gbps - patible With ANSI TIA/EIA-644-A LVDS Standard - Available Packaging 38-Pin TSSOP - 25 m V of Input Voltage Threshold Hysteresis - Propagation Delay Times: 800 ps Typical - Inputs Electrically patible With LVPECL, CML and LVDS Signal Levels - Operates From a Single 3.3-V Supply - Low Power: 110 m A Typical - Integrated 110-Ω Line Termination Resistors Available With SN65LVDT250 APPLICATIONS - Clock Buffering/Clock Muxing - Wireless Base Stations - High-Speed Network Routing - Tele/Data DESCRIPTION The SN65LVDS250 and SN65LVDT250 are 4x4 nonblocking crosspoint switches in a flow-through pin-out allowing for ease in PCB layout. Low-voltage differential signaling (LVDS) is used to achieve a high-speed data throughput while using low power. Each of the output drivers includes a 4:1 multiplexer to allow any input to be routed to any output. Internal signal paths are fully differential to achieve the high signaling speeds while maintaining low signal skews. The SN65LVDT250 incorporates 110-Ω termination resistors for those applications where board space is a...