SN65LVDS96 receiver equivalent, lvds serdes receiver.
* 3:21 Data Channel Compression at up to 1.428 Gigabits/s Throughput
* Suited for Point-to-Point Subsystem Communication With Very Low EMI
* 3 Data Channels a.
of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION D.
The SN65LVDS96 LVDS serdes (serializer/deserializer) receiver contains three serial-in 7-bit parallel-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These.
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