MSP50C33
description
The MSP50x3x family uses a revolutionary architecture to bine an 8-bit microprocessor, two speech synthesizers, ROM, RAM, and I/O in a low-cost single-chip system. The architecture uses the same arithmetic logic unit (ALU) for the two synthesizers and the microprocessor, thus reducing chip area and cost and enabling the microprocessor to do a multiply operation in 0.8 µs. The MSP50x3x family features two independent channels of linear predictive coding (LPC), which synthesize high-quality speech at a low data rate. Pulse-code modulation (PCM) can produce music or sound effects. LPC and PCM can be added together to produce a posite result. For more information, see the MSP50x3x User’s Guide (literature number SPSU006).
Table 1. MSP50x3x Family
DEVICE MSP50C32 MSP50C33 MSP50C34 MSP50P34 MSP50C37 MSP50P37
AMOUNT OF ROM/PROM 16K bytes mask ROM 32K bytes mask ROM 64K bytes mask ROM 64K bytes PROM 16K bytes mask ROM 16K bytes PROM
FEATURES
9/10 I/O lines 9/10 I/O lines 9/10...
