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LMK04906 - Ultralow Noise Clock Jitter Cleaner/Multiplier

Description

The LMK04906 is the industry's highest performance clock jitter attenuator with superior clock jitter cleaning, generation, and distribution with advanced

Features

  • 1 Ultralow RMS Jitter Performance.
  • 100-fs RMS Jitter (12 kHz to 20 MHz).
  • 123-fs RMS Jitter (100 Hz to 20 MHz).
  • Dual Loop PLLatinum™ PLL Architecture.
  • PLL1.
  • Integrated Low-Noise Crystal Oscillator Circuit.
  • Holdover Mode when Input Clocks are Lost.
  • Automatic or Manual Triggering/Recovery.
  • PLL2.
  • Normalized [1 Hz] PLL Noise Floor of.
  • 227 dBc/Hz.
  • Phase Detector Rate up to 155 MHz.
  • OSCin.

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Full PDF Text Transcription

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Product Folder Order Now Technical Documents Tools & Software Support & Community LMK04906 SNAS589F – JUNE 2012 – REVISED AUGUST 2017 LMK04906 Ultralow Noise Clock Jitter Cleaner and Multiplier With 6 Programmable Outputs 1 Features •1 Ultralow RMS Jitter Performance – 100-fs RMS Jitter (12 kHz to 20 MHz) – 123-fs RMS Jitter (100 Hz to 20 MHz) • Dual Loop PLLatinum™ PLL Architecture – PLL1 – Integrated Low-Noise Crystal Oscillator Circuit – Holdover Mode when Input Clocks are Lost – Automatic or Manual Triggering/Recovery – PLL2 – Normalized [1 Hz] PLL Noise Floor of –227 dBc/Hz – Phase Detector Rate up to 155 MHz – OSCin Frequency-doubler – Integrated Low-Noise VCO • 3 Redundant Input Clocks with LOS – Automatic and Manual Switch-Over Modes • 50% Duty Cycle Output Divides, 1 to 1045
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