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LMK04208 - Low-Noise Clock Jitter Cleaner

General Description

The LMK04208 is a high performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced

Key Features

  • 1 Ultra-Low RMS Jitter Performance.
  • 111 fs, RMS Jitter (12 kHz to 20 MHz).
  • 123 fs, RMS Jitter (100 Hz to 20 MHz).
  • Dual Loop PLLatinum™ PLL Architecture.
  • PLL1.
  • Integrated Low-Noise Crystal Oscillator Circuit.
  • Holdover Mode when Input Clocks are Lost.
  • Automatic or Manual Triggering/Recovery.
  • PLL2.
  • Normalized PLL Noise Floor of.
  • 227 dBc/Hz.
  • Phase Detector Rate of Up to 155 MHz.
  • OSCin.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community LMK04208 SNAS684 – SEPTEMBER 2016 LMK04208 Low-Noise Clock Jitter Cleaner with Dual Loop PLLs 1 Features •1 Ultra-Low RMS Jitter Performance – 111 fs, RMS Jitter (12 kHz to 20 MHz) – 123 fs, RMS Jitter (100 Hz to 20 MHz) • Dual Loop PLLatinum™ PLL Architecture • PLL1 – Integrated Low-Noise Crystal Oscillator Circuit – Holdover Mode when Input Clocks are Lost – Automatic or Manual Triggering/Recovery • PLL2 – Normalized PLL Noise Floor of –227 dBc/Hz – Phase Detector Rate of Up to 155 MHz – OSCin Frequency-Doubler – Integrated Low-Noise VCO or External VCO Mode • Two Redundant Input Clocks with LOS – Automatic and Manual Switch-Over Modes • 50 % Duty Cycle Output Divides, 1 to 1045 (Even and Odd) • 6