Click to expand full text
Product Folder
Sample & Buy
Technical Documents
Tools & Software
Support & Community
LMK00804B
SNAS642A – JUNE 2014 – REVISED JULY 2014
LMK00804B Low Skew, 1-to-4 Multiplexed Differential/LVCMOS-to-LVCMOS/TTL Fanout Buffer
1 Features
•1 Four LVCMOS/LVTTL Outputs with 7 Ω Output Impedance – Additive Jitter: 0.04 ps RMS (typ) @ 125 MHz – Noise Floor: –166 dBc/Hz (typ) @ 125 MHz – Output Frequency: 350 MHz (max) – Output Skew: 35 ps (max) – Part-to-Part Skew: 700 ps (max)
• Two Selectable Inputs – CLK, nCLK Pair Accepts LVPECL, LVDS, HCSL, SSTL, LVHSTL, or LVCMOS/LVTTL – LVCMOS_CLK Accepts LVCMOS/LVTTL
• Synchronous Clock Enable • Core/Output Power Supplies:
– 3.3 V/3.3 V – 3.3 V/2.5 V – 3.3 V/1.8 V – 3.3 V/1.