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LMK00334 - Four-Output Clock Buffer and Level Translator

Description

The LMK00334 device is a 4-output HCSL fanout buffer intended for high-frequency, low-jitter clock, data distribution, and level translation.

Features

  • 3:1 Input multiplexer.
  • Two universal inputs operate up to 400 MHz and accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or single-ended clocks.
  • One crystal input accepts a 10- to 40-MHz crystal or single-ended clock.
  • Two banks with two differential outputs each.
  • HCSL, or Hi-Z (selectable).
  • Additive RMS phase jitter for PCIe Gen5 at 100 MHz:.
  • 15 fs RMS (typical).
  • High PSRR:.
  • 72 dBc at 156.25 MHz.
  • LVCMOS output wit.

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Full PDF Text Transcription

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LMK00334 SNAS635E – DECEMBER 2013 – REVISED JANUARY 2022 LMK00334 Four-Output Clock Buffer and Level Translator for PCIe Gen 1 to Gen 5 1 Features • 3:1 Input multiplexer – Two universal inputs operate up to 400 MHz and accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or single-ended clocks – One crystal input accepts a 10- to 40-MHz crystal or single-ended clock • Two banks with two differential outputs each – HCSL, or Hi-Z (selectable) – Additive RMS phase jitter for PCIe Gen5 at 100 MHz: • 15 fs RMS (typical) • High PSRR: –72 dBc at 156.25 MHz • LVCMOS output with synchronous enable input • Pin-controlled configuration • VCC core supply: 3.3 V ± 5% • Three independent VCCO output supplies: 3.3 V, 2.
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