LM98714
Features
- 1 LVDS/CMOS Outputs
- LVDS/CMOS Pixel Rate Input Clock or ADC Input
Clock
- CDS or S/H Processing for CCD or CIS Sensors
- Independent Gain/Offset Correction for Each
Channel
- Digital Black Level Correction Loop for Each
Channel
- Programmable Input Clamp Voltage
- Flexible CCD/CIS Sensor Timing Generator
- Key Specifications
- Maximum Input Level: 1.2 or 2.4 Volt Modes
- (Both with + or
- Polarity Option)
- ADC Resolution: 16-Bit
- ADC Sampling Rate: 45 MSPS
- INL: ±23 LSB (Typ)
- Channel Sampling Rate: 15/22.5/30 MSPS
- PGA Gain Steps: 256 Steps
- PGA Gain Range: 0.7 to 7.84x
- Analog DAC Resolution: ±9 Bits
- Analog DAC Range: ±300 m V or ±600 m V
- Digital DAC Resolution: ±6 Bits
- Digital DAC Range:
- 1024 LSB to + 1008 LSB
- SNR:
- 74d B (at 0 d B PGA Gain)
- Power Dissipation: 505 m W (LVDS) 610 m W
(CMOS)
- Operating Temp: 0 to 70°C
- Supply Voltage: 3.3 V Nominal (3.0 V to 3.6 V
Range)
2 Applications
- Multi-Function Peripherals
- Facsimile Equipment
- Flatbed or Handheld...
