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LM4308 - Mobile Pixel Link Two (MPL-2) - 18-bit CPU Display Interface Master/Slave

Description

The LM4308 device adapts a 18-bit CPU style display interfaces to a MPL-2 SLVS differential serial link for displays.

Two chip selects support a main and sub display up to and beyond 640 x 480 pixels.

A mode pin configures the device as a Master (MST) or Slave (SLV).

Features

  • 1.
  • 2 18-bit i80 CPU Display Interface.
  • Supports up to 640 x 480 VGA Formats.
  • Differential SLVS Interface.
  • Dual Displays Supported.
  • WRITE and READ Operations Supported.
  • Robust Differential Physical Layer.
  • 400mVpp Differential Signal Swing.
  • Internal 100 Ω Termination Resistor.
  • Low Power Consumption.
  • 5-bit CRC for Data Integrity.
  • Level Translation between Host and Display.
  • Low Power Sleep Stat.

📥 Download Datasheet

Datasheet Details

Part number LM4308
Manufacturer Texas Instruments
File Size 0.99 MB
Description Mobile Pixel Link Two (MPL-2) - 18-bit CPU Display Interface Master/Slave
Datasheet download datasheet LM4308 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
LM4308 www.ti.com SNLS225C – AUGUST 2007 – REVISED MAY 2013 LM4308 Mobile Pixel Link Two (MPL-2) – 18-bit CPU Display Interface Master/Slave Check for Samples: LM4308 FEATURES 1 •2 18-bit i80 CPU Display Interface • Supports up to 640 x 480 VGA Formats • Differential SLVS Interface • Dual Displays Supported • WRITE and READ Operations Supported • Robust Differential Physical Layer • 400mVpp Differential Signal Swing • Internal 100 Ω Termination Resistor • Low Power Consumption • 5-bit CRC for Data Integrity • Level Translation between Host and Display • Low Power Sleep State • 3.3V Tolerant Master Clock Input Regardless of VDDIO • Fast Start Up Time - 1k CLK Cycles • 1.6V to 2.0V Core / Analog Supply Voltage • 1.6V to 3.
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