DS90LV001
Description
The DS90LV001 LVDS-LVDS Buffer takes an LVDS input signal and provides an LVDS output signal.
Key Features
- 2 Single +3.3 V Supply
- LVDS Receiver Inputs Accept LVPECL Signals
- TRI-STATE Outputs
- Receiver Input Threshold < ±100 mV
- Fast Propagation Delay of 1.4 ns (Typ)
- Low Jitter 800 Mbps Fully Differential Data
- 100 ps (Typ) of pk-pk Jitter with PRBS = 223−1
- 8 pin SOIC and Space Saving (70%) WSON
- Industrial Temperature Range
