DS90CR286AT-Q1 receiver equivalent, 3.3 v rising edge data strobe lvds receiver.
*1 20 to 66 MHz Shift Clock Support
* 50% Duty Cycle on Receiver Output Clock
* Best
–in
–Class Setup & Hold Times on Rx Outputs.
* Video Displays
* Automotive Infotainment
* Industrial Printers and Imaging
* Digital Video Transport <.
The DS90CR286AT-Q1 receiver converts four LVDS (Low Voltage Differential Signaling) data streams back into parallel 28 bits of LVCMOS data. The receiver data outputs strobe on the output clock's rising edge.
The receiver LVDS clock operates at rates .
Image gallery
TAGS