DS90CR285 Overview
The DS90CR285 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted.
DS90CR285 Key Features
- 2 Single +3.3V Supply
- Chipset (Tx + Rx) Power Consumption <250
- Power-Down Mode (<0.5 mW total)
- Up to 231 Megabytes/sec Bandwidth
- Up to 1.848 Gbps Data Throughput
- Narrow Bus Reduces Cable Size
- 290 mV Swing LVDS Devices for Low EMI
- +1V mon Mode Range (Around +1.2V)
- PLL Requires no External ponents
- Both Devices are Offered in a Low Profile 56