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DS90C402 - Dual Low Voltage Differential Signaling Receiver

General Description

The DS90C402 is a dual receiver device optimized for high data rate and low power applications.

This device along with the DS90C401 provides a pair chip solution for a dual high speed point-to-point interface.

The device is in a PCB space saving 8 lead small outline package.

Key Features

  • 1.
  • 2 Ultra Low Power Dissipation.
  • Operates above 155.5 Mbps.
  • Standard TIA/EIA-644.
  • 8 Lead SOIC Package saves PCB space.
  • VCM ±1V center around 1.2V.
  • ±100 mV Receiver Sensitivity.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS90C402 www.ti.com SNLS001C – JUNE 1998 – REVISED APRIL 2013 DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver Check for Samples: DS90C402 FEATURES 1 •2 Ultra Low Power Dissipation • Operates above 155.5 Mbps • Standard TIA/EIA-644 • 8 Lead SOIC Package saves PCB space • VCM ±1V center around 1.2V • ±100 mV Receiver Sensitivity DESCRIPTION The DS90C402 is a dual receiver device optimized for high data rate and low power applications. This device along with the DS90C401 provides a pair chip solution for a dual high speed point-to-point interface. The device is in a PCB space saving 8 lead small outline package. The receiver offers ±100 mV threshold sensitivity, in addition to common-mode noise protection.