DLPC3437 Datasheet | Texas Instruments

DLPS084D - JANUARY 2017 - REVISED AUGUST 2021 DLPC3437 Display Controller 1 Features - Display controller for DLP3310 (.33 1080p) DMD - Two DLP3437 controllers drive the DLP3310 DMD - Supports input image sizes up to 1080p - Low-power DMD interface with interface training - Input frame rates up to 120 Hz (60 Hz at 1080p resolution) - Pixel data processing: - Intelli Bright™ suite of image processing algorithms - Content adaptive illumination control (CAIC) - Local area brightness boost (LABB) - Color coordinate adjustment - Programmable degamma - Image resizing (scaling) - Color space conversion - 24-bit, input pixel interface support: - Parallel interface protocol - Pixel clock up to 155 MHz - Multiple input pixel data format options - Dual FPD-link input pixel interface support utilize with required FPGA: - LVDS interface - Effective pixel clock up to 155 MHz - External flash support - Auto DMD parking at power down - Embedded frame memory (e DRAM) - System...