DAC3162 Datasheet

Features and Benefits

1
• Low Power: 270 mW at 500 MSPS
• LVDS Input Data Bus
  – Interleaved DDR Data Load
• High DC Accuracy: ±0.25 LSB DNL (10-bit), ± 0.5 LSB INL (12-bit)
• Low Latency: 1.5 Clock Cycles
• Simple Control: No Software Required
• Differential Scalable Output: 2 mA to 20 mA
• On-Chip 1.2-V Reference
• 1.8-.