CY74FCT2827T Datasheet | Texas Instruments

D Function and Pinout patible With FCT, F, and AM29827 Logic D 25-Ω Output Series Resistors Reduce Transmission-Line Reflection Noise D Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions D Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics D Ioff Supports Partial-Power-Down Mode Operation D ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) D Matched Rise and Fall Times D Fully patible With TTL Input and Output Logic Levels D 12-m A Output Sink Current 15-m A Output Source Current D 3-State Outputs CY74FCT2827T 10-BIT BUFFER WITH 3-STATE OUTPUTS SCCS045A - MAY 1994 - REVISED SEPTEMBER 2001 Q PACKAGE (TOP VIEW) OE1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 1 2 3 4 5 6 7 8 9 10 11 12 24 VCC 23 Y0 22 Y1 21 Y2 20 Y3 19 Y4 18 Y5 17 Y6 16 Y7 15 Y8 14 Y9 13 OE2 description The CY74FCT2827T 10-bit buffer provides high-performance bus-interface buffering for wide data/address paths or buses carrying parity. This 10-bit buffer has NANDed output-enable (OE) inputs for maximum control flexibility. The CY74FCT2827T is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes and all outputs are designed for low-capacitance bus loading in the high-impedance state. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2827T can replace the CY74FCT827T to reduce noise in an existing design. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING...