CY74FCT162823T Datasheet | Texas Instruments

Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16823T CY74FCT162823T SCCS062B - August 1994 - Revised September 2001 Features - Ioff supports partial-power-down mode operation - Edge-rate control circuitry for significantly improved noise characteristics - Typical output skew < 250 ps - ESD > 2000V - TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages - Industrial temperature range of - 40˚C to +85˚C - VCC = 5V ± 10% CY74FCT16823T Features : - 64 m A sink current, 32 m A source current - Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C CY74FCT162823T Features : - Balanced 24 m A output drivers - Reduced system switching noise - Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25˚C 18-Bit Registers Functional Description The CY74FCT16823T and the CY74FCT162823T 18-bit bus interface registers are designed for use in high-speed, low-power systems needing wide registers and parity. 18-bit operation is achieved by connecting the control lines of the two 9-bit registers. Flow-through pinout and small shrink packaging aids in simplifying board layout. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16823T is ideally suited for driving high-capacitance loads and low-impedance...