CDCVF2505
Description
The CDCVF2505 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver.
Key Features
- 1 Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications
- Operating Frequency: 24 MHz to 200 MHz
- Low Jitter (Cycle-to-Cycle): < |150 ps
- Three-States Outputs When There Is No Input Clock
- Operates From Single 3.3-V Supply
- Available in 8-Pin TSSOP and 8-Pin SOIC Packages
- Consumes Less Than 100 mA (Typical) in PowerDown Mode
- Internal Feedback Loop Is Used to Synchronize the Outputs to the Input Clock
- 25-Ω On-Chip Series Damping Resistors
Applications
- Synchronous DRAMs
